Temperature control is one of the key factors in the effective operation of a MOSFET or IGBT power module. While some MOSFETs are equipped with internal temperature sensors (body diodes), other methods can be used to monitor temperature. Semiconductor silicon PTC thermistors can be good for current control, or platinum-based or niobium-based (RTD) resistance temperature detectors can be used with lower resistance values to achieve higher detection linearity. Whether the sensor is a surface mount device, lead bonded die or sintered die, NTC thermistors are still excellent sensitivity and versatile temperature sensors. With proper design, it can ensure proper derating of the module and eventual shutdown of the module in case of overheating or excessive external temperature.
In this paper, we focus on bonded NTC die and use analog circuit simulation to illustrate the basic principles of power module derating and shutdown. Why Simulation? Simulation is the ideal way to simplify and illustrate different phenomena in a visual way, also suitable for developing intuitive applications. The last motivation was economic: we developed the simulation using only free software (LTspice), while other design tools were used for more complex designs.
Now, let's look at the LTspice design shown in Figure 1, which is a simple boost converter design. However, due to the versatility of LTspice, the IGBT and diode models are replaced by a thermal model where the heat flux is explicitly represented by an output pin that can be connected to a thermal circuit (such as a heat sink). We use a simple RC circuit (in practice, the designer needs to carefully define the Zth model as a Cauer or Foster model).
During converter operation, the heat flux forms a hot spot (in this case, the node Tsyst generates a voltage and needs to control the temperature). This temperature is input to the NTC model (Vishay lead bonded die NTCC200E4203_T). the NTC signal is compared to a sawtooth signal (Vsaw) via a Wheatstone bridge with a threshold comparison and amplification. The final output Vsw is the pulse signal added to the IGBT gate. rlim resistance defines the temperature threshold below which we add a 100 % full duty cycle pulse to the IGBT gate. When overheating - the IGBT and diode generate heat - combined with the ambient temperature (Tamb voltage at the thermal circuit node), the duty cycle decreases and the buck converter output/input ratio (Vout / Vcc) drops. As a result, the heat is reduced and the temperature starts to stabilize. Above a certain temperature limit, this ratio must be reduced to 1.
In order to complete the simulation in a reasonable time, the heat sink heat must be reduced. The heat increase can take minutes or even hours, and we want to see the results in a very short time.
Here are the simulation results: Each graph shows the results with or without temperature derating (Rlim is taken very low in order to eliminate temperature control).
As shown in Figure 2, the boost converter typically oscillates during the first 20 ms, with unoptimized performance. The temperature Tsyst (Figure 4) starts to rise, then the ambient temperature rises and Vout / Vcc starts to derate when Tsyst reaches 90 °C. The duty cycle drops a little for each point of ambient temperature increase until the boost converter fails completely. 110 °C is when the derating reaches its maximum.
Without temperature protection, Tsyst can reach 160 °C to 170 °C (Figure 4). In real power modules, the die peak temperature can reach 200 °C or higher.
The voltages Vsense, Vntc and Vlim are shown in Figure 3. Figures 5 and 6 show the different time duty cycle variations.
Of course, all thresholds are adjustable and the switching thresholds can be adjusted accordingly.
For more complex simulations, we can also reconstruct the full-bridge IGBT module (shown in Figure 7). This circuit generates a 50 Hz sinusoidal current with an inductive load and the IGBT switching frequency is 30 kHz. The gate driver simulation circuit maintains a constant frequency below 125 °C and reduces the duty cycle to mitigate the losses of the IGBT above this temperature.
In Figure 8, we can see the total thermal power generated by the IGBT switching (I(V6) in W), and the temperature increase over time (V(Tsyst) in degrees Celsius).
The lower graph of Figure 8 shows the generated current.
Without going into detail, adjusting the modulation parameters reduces the temperature rise with time (lower panel of Figure 8, red curve): shortening the switching duty time reduces the heat generation, but also causes a loss of sinusoidal signal.
We will not go into detail about this situation, but we hope that the examples provided illustrate the far-reaching implications of LTspice circuit simulation using NTC thermistors to help MOSFET / IGBT module design engineers develop intuitive circuits and help them provide circuit protection by reducing heat.
